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Integrated Circuit Systems, Inc.
ICS840011
FEMTOCLOCKSTM CRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR
FEATURES
* 1 LVCMOS/LVTTL output, 7 output impedence * Crystal oscillator interface designed for a 26.5625MHz or 25MHz, 18pF parallel resonant crystal * Output frequency: 106.25MHz (typical) * VCO range: 560MHz to 680MHz * RMS phase jitter @ 106.25MHz, using a 26.5625MHz crystal (637KHz - 10MHz): 0.780ps (typical) * RMS phase noise at 106.25MHz (typical) Phase noise: Offset Noise Power 100Hz ............... -95.7 dBc/Hz 1KHz ................ -121 dBc/Hz 10KHz ................ -129 dBc/Hz 100KHz .............. -129.6 dBc/Hz * 3.3V operating supply * -30C to 85C ambient operating temperature
GENERAL DESCRIPTION
The ICS840011 is a Fibre Channel Clock Generator and a member of the HiPerClocksTM HiPerClockSTM family of high performance devices from ICS. The ICS840011 uses a 26.5625MHz or 25MHz crystal to synthesize 106.25MHz or 100MHz respectively. The ICS840011 has excellent phase jitter performance, from 637KHz - 10MHz integration range. The ICS840011 is packaged in a small 8-pin TSSOP, making it ideal for www..com use in systems with limited board space.
ICS
FREQUENCY TABLE
Inputs Crystal Frequency (MHz) 26.5625 25 Output Frequency (MHz) 106.25 100
BLOCK DIAGRAM
OE (Pullup) XTAL_IN
PIN ASSIGNMENT
VCO
637.5MHz w/ 26.5625MHz Ref.
OSC
XTAL_OUT
Phase Detector
/6
Q0
VDDA OE XTAL_OUT XTAL_IN
1 2 3 4
8 7 6 5
VDD Q0 GND nc
ICS840011
8-Lead TSSOP 4.40mm x 3.0mm x 0.925mm package body G Package Top View
M = /24 (fixed)
840011AG
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REV. A OCTOBER 15, 2004
Integrated Circuit Systems, Inc.
ICS840011
FEMTOCLOCKSTM CRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR
Type Power Input Input Pullup Description Analog supply pin. Output enable pin. When HIGH, Q0 output is enabled. When LOW, forces Q0 to HiZ state. LVCMOS/LVTTL interface levels. Crystal oscillator interface. XTAL_IN is the input, XTAL_OUT is the output. No connect. Power supply ground. Single-ended clock output. LVCMOS/LVTTL interface levels. 7 output impedance. Core supply pin.
TABLE 1. PIN DESCRIPTIONS
Number 1 2 3, 4 5
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Name VDDA OE XTAL_OUT, XTAL_IN nc GND Q0 VDD
Unused Power Output Power
6
7 8
NOTE: Pullup refers to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Symbol CIN CPD RPULLUP ROUT Parameter Input Capacitance Power Dissipation Capacitance Input Pullup Resistor Output Impedance 5 VDD, VDDA = 3.465V Test Conditions Minimum Typical 4 24 51 7 12 Maximum Units pF pF K
TABLE 3. CONTROL FUNCTION TABLE
Control Inputs OE 0 1 Output Q0 Hi-Z Active
840011AG
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REV. A OCTOBER 15, 2004
Integrated Circuit Systems, Inc.
ICS840011
FEMTOCLOCKSTM CRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR
4.6V -0.5V to VDD + 0.5 V -0.5V to VDD + 0.5V 101.7C/W (0 mps) -65C to 150C NOTE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond those listed in the DC Characteristics or AC Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability.
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, VDD Inputs, VI Outputs, VO Package Thermal Impedance, JA Storage Temperature, TSTG
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TABLE 4A. POWER SUPPLY DC CHARACTERISTICS, VDD = VDDA = 3.3V5%, TA = -30C TO 85C
Symbol VDD VDDA IDD IDDA Parameter Core Supply Voltage Analog Supply Voltage Power Supply Current Analog Supply Current Test Conditions Minimum 3.135 3.135 Typical 3.3 3.3 Maximum 3.465 3.465 80 10 Units V V mA mA
TABLE 4B. LVCMOS/LVTTL DC CHARACTERISTICS, VDD = VDDA = 3.3V5%, TA = -30C TO 85C
Symbol VIH VIL IIH IIL VOH Parameter Input High Voltage Input Low Voltage Input High Current Input Low Current OE OE VDD = VIN = 3.465V VDD = 3.465V, VIN = 0V -150 2.6 0.5 Test Conditions Minimum 2 -0.3 Typical Maximum VDD + 0.3 0.8 5 Units V V A A V V
Output High Voltage; NOTE 1
VOL Output Low Voltage; NOTE 1 NOTE 1: Outputs terminated with 50 to VDD/2. See Parameter Measurement Information Section, "3.3V Output Load Test Circuit".
TABLE 5. CRYSTAL CHARACTERISTICS
Parameter Mode of Oscillation Frequency Equivalent Series Resistance (ESR) Shunt Capacitance Test Conditions Minimum Typical Fundamental 26.5625 50 7 MHz pF Maximum Units
TABLE 6. AC CHARACTERISTICS, VDD = VDDA = 3.3V5%, TA = -30C TO 85C
Symbol fOUT Parameter Output Frequency RMS Phase Jitter (Random); NOTE 1 Output Rise/Fall Time Test Conditions fOUT = 106.25MHz, (637KHz to 10MHz) 20% to 80% fOUT = 106.25MHz Minimum 93.33 Typical 106.25 0.780 250 48 600 52 Maximum 113.33 Units MHz ps ps %
tjit(O)
tR / tF
odc Output Duty Cycle All parameters are characterized @ 106.25MHz. NOTE 1: Please refer to the Phase Noise Plot.
840011AG
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3
REV. A OCTOBER 15, 2004
Integrated Circuit Systems, Inc.
ICS840011
FEMTOCLOCKSTM CRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR
TYPICAL PHASE NOISE AT 106.25MHZ
-10 -20 www..com -30 -40 -50 -60
Fibre Channel Filter 106.25MHz
RMS Phase Jitter (Random) 637K to 10MHz = 0.780ps (typical)
0
NOISE POWER dBc Hz
-70 -80 -90 -100 -110
Raw Phase Noise Data
-120 -130 -140 -150 -160 -170 -180 -190 100 1k
10k
Phase Noise Result by adding Fibre Channel Filter to raw data
100k 1M 10M 100M
OFFSET FREQUENCY (HZ)
840011AG
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4
REV. A OCTOBER 15, 2004
Integrated Circuit Systems, Inc.
ICS840011
FEMTOCLOCKSTM CRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR
PARAMETER MEASUREMENT INFORMATION
1.65V 5%
Phase Noise Plot
V DD www..com
SCOPE
Qx
Phase Noise Mask
LVCMOS
GND
f1
Offset Frequency
f2
-1.65V 5%
RMS Jitter = Area Under the Masked Phase Noise Plot
3.3V OUTPUT LOAD AC TEST CIRCUIT
RMS PHASE JITTER
V
DD
Q0
Pulse Width t
2
80% 20% tR
80% 20% tF
PERIOD
Clock Outputs
odc =
t PW t PERIOD
OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD
OUTPUT RISE/FALL TIME
840011AG
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5
REV. A OCTOBER 15, 2004
Integrated Circuit Systems, Inc.
ICS840011
FEMTOCLOCKSTM CRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR APPLICATION INFORMATION
POWER SUPPLY FILTERING TECHNIQUES
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As in any high speed analog circuitry, the power supply pins are vulnerable to random noise. The ICS840011 provides separate power supplies to isolate any high switching noise from the outputs to the internal PLL. VDD, and VDDA should be individually connected to the power supply plane through vias, and bypass capacitors should be used for each pin. To achieve optimum jitter performance, power supply isolation is required. Figure 1 illustrates how a 10 resistor along with a 10F and a .01F bypass capacitor should be connected to each VDDA pin.
3.3V VDD .01F 10
V DDA .01F 10F
FIGURE 1. POWER SUPPLY FILTERING
CRYSTAL INPUT INTERFACE
The ICS840011 has been characterized with 18pF parallel resonant crystals. The capacitor values, C1 and C2, shown in Figure 2 below were determined using a 26.5625MHz, 18pF parallel resonant crystal and were chosen to minimize the ppm error. The optimum C1 and C2 values can be slightly adjusted for different board layouts.
XTAL_OUT C1 33p X1 18pF Parallel Crystal XTAL_IN C2 27p
Figure 2. CRYSTAL INPUt INTERFACE
840011AG
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6
REV. A OCTOBER 15, 2004
Integrated Circuit Systems, Inc.
ICS840011
FEMTOCLOCKSTM CRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR
106.25MHz output frequency. The C1 = 27pF and C2 = 33pF are recommended for frequency accuracy. For different board layout, the C1 and C2 values may be slightly adjusted for optimizing frequency accuracy.
APPLICATION SCHEMATIC
Figure 3A shows a schematic example of the ICS840011. An example of LVCMOS termination is shown in this schematic. Additional LVCMOS termination approaches are shown in the LVCMOS Termination Application Note. In this example, an 18pF parallel resonant 26.5625MHz crystal is used for generating
VDD
R2 10
VDDA
C3 10uF
C4 0.1u
U1
OE
1 2 3 4
VDDA OE XTAL_OUT XTAL_IN
VDD Q0 GND NC
8 7 6 5
VDD Q
R3 43
Zo = 50 Ohm
C2 33pF
X1
ICS840011
C5 0.1u
LVCMOS
C1 27pF
VDD=3.3V
FIGURE 3A. ICS840011 SCHEMATIC EXAMPLE
PC BOARD LAYOUT EXAMPLE
Figure 3B shows an example of P.C. board layout. The crystal X1 footprint in this example allows either surface mount (HC49S) or through hole (HC49) package. C3 is 0805. C1 and C2 are
0402. Other resistors and capacitors are 0603. This layout assumes that the board has clean analog power and ground planes.
FIGURE 3B. ICS840011 PC BOARD LAYOUT EXAMPLE
840011AG
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7
REV. A OCTOBER 15, 2004
Integrated Circuit Systems, Inc.
ICS840011
FEMTOCLOCKSTM CRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR RELIABILITY INFORMATION
TABLE 7. JAVS. AIR FLOW TABLE
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FOR
8 LEAD TSSOP
JA by Velocity (Meters Per Second)
0 1
90.5C/W
2.5
89.8C/W
Multi-Layer PCB, JEDEC Standard Test Boards
101.7C/W
TRANSISTOR COUNT
The transistor count for ICS840011 is: 1521
840011AG
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8
REV. A OCTOBER 15, 2004
Integrated Circuit Systems, Inc.
ICS840011
FEMTOCLOCKSTM CRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR
8 LEAD TSSOP
PACKAGE OUTLINE - G SUFFIX
FOR
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TABLE 8. PACKAGE DIMENSIONS
SYMBOL N A A1 A2 b c D E E1 e L aaa 0.45 0 -4.30 0.65 BASIC 0.75 8 0.10 -0.05 0.80 0.19 0.09 2.90 6.40 BASIC 4.50 Millimeters Minimum 8 1.20 0.15 1.05 0.30 0.20 3.10 Maximum
Reference Document: JEDEC Publication 95, MO-153
840011AG
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9
REV. A OCTOBER 15, 2004
Integrated Circuit Systems, Inc.
ICS840011
FEMTOCLOCKSTM CRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR
Marking 011A 011A 011AN 011AN Package 8 lead TSSOP 8 lead TSSOP on Tape and Reel 8 lead "Lead Free Annealed" TSSOP 8 lead "Lead Free Annealed" TSSOP on Tape and Reel Count 100 per tube 2500 100 per tube 2500 Temperature -30C to 85C -30C to 85C -30C to 85C -30C to 85C
TABLE 9. ORDERING INFORMATION
Part/Order Number ICS840011AG ICS840011AGT ICS840011AGLN ICS840011AGLNT
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The aforementioned trademarks, HiPerClockSTM
and FemtoClocksTM
are a trademark of Integrated Circuit Systems, Inc. or its subsidiaries in the United States and/or other countries.
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated (ICS) assumes no responsibility for either its use or for infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial and industrial applications. Any other applications such as those requiring high reliability or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments. 840011AG
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10
REV. A OCTOBER 15, 2004
Integrated Circuit Systems, Inc.
ICS840011
FEMTOCLOCKSTM CRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR
REVISION HISTORY SHEET
Rev A
Table T9
Page 10
Description of Change Ordering Information Table - corrected count from 154 per tube to 100.
Date 10/15/04
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840011AG
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REV. A OCTOBER 15, 2004

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